Abstract
By using a mixer to down-convert the high frequency components of a signal, digital bandwidth interleaving (DBI) technology can simultaneously increase the sampling rate and bandwidth of the sampling system, compared to the time-interleaved and hybrid filter bank. However, the software and hardware of the classical architecture are too complicated, which also leads to poor performance. In particular, the pilot tone used to synchronize the analog and digital local oscillators (LO) of mixers intermodulates with the high frequency components of the signal, resulting in larger spurs. This paper proposes a synchronous mixing architecture for the DBI system, where the LO of the analog mixer is synchronized with the sampling clock of the analog-to-digital converter. Its hardware and software are simplified—the pilot tone used to synchronize the LOs can also be removed. An evaluation platform with a sampling rate of 250 MSPS is implemented to illustrate the performance of the new architecture. The result shows that the spurious free dynamic range (SFDR) of the new architecture is more than 20 dB higher than the classical one in a high frequency range. The rise time of a step signal of the new architecture is 0.578 ± 0.070 ns faster than the classical one with the same bandwidth (90 MHz).
Highlights
The demand for sampling systems with a higher bandwidth and sample rate has dramatically increased for such fields as software-defined radio, coherent optical communication and time domain measurement [1,2,3]
A series of frequency-interleaved architectures that use mixers to down-convert the input signal have been proposed [3,13,14,15,16,17,18,19]. They can be divided into two categories: one is similar to time-interleaved analog-to-digital converter (ADC), where the input signal is first distributed to each channel by a power divider and down-converted by a mixer, which is generally a complex mixer [13,15,17,18]; the other is similar to the hybrid filter bank (HFB) system, where the analog analysis filter bank allocates the input signal to the sub-channel, followed by down-conversion
After we obtain the frequency response of the analog front-end circuit, we can refer to the design method of the synthesis filter bank in the HFB system to design G1 ejω and G2 ejω [27]
Summary
The demand for sampling systems with a higher bandwidth and sample rate has dramatically increased for such fields as software-defined radio, coherent optical communication and time domain measurement [1,2,3]. Another popular architecture for parallelizing ADCs is proposed in [12], which is called hybrid filter bank (HFB) It uses an analog analysis filter bank to replace the input power divider (or driver amplifier) in a time-interleaved system. A series of frequency-interleaved architectures that use mixers to down-convert the input signal have been proposed [3,13,14,15,16,17,18,19] They can be divided into two categories: one is similar to time-interleaved ADCs, where the input signal is first distributed to each channel by a power divider and down-converted by a mixer, which is generally a complex mixer [13,15,17,18]; the other is similar to the HFB system, where the analog analysis filter bank allocates the input signal to the sub-channel, followed by down-conversion.
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