Synchronous digit switching in highly interconnected communication networks

Abstract

Highly interconnected networks to be used for the distribution of high-speed digital information are currently the subject of design studies by both civil and military research organisations. One problem in such networks is that any frequency asynchronism between the oscillators which control digit switching at trunk exchanges can result in loss of information. Methods of controlling the frequency of oscillators to develop a common average frequency at all exchanges and so prevent information loss are discussed in the paper.The absence of a reference frequency, coupled with the effects of transmission delay between exchanges, can result in a controlled frequency which is outside the tolerance band of the uncontrolled frequencies. This feature applies when a linear control characteristic is employed and leads to an argument which favours a nonlinear characteristic. Control-loop stability is discussed, the bandwidth of the circuit used to extract digit-timing information being shown to be a critical factor affecting stability.