Synchronized Multi-Rate Test Pattern Generation Using Hybrid Twisted Ring Counter and LFSR for BIST Application

Abstract

This work presents a new approach for built-in test pattern generation (BIST) based on the variable rate clock-driven linear feedback shift register (LFSR) and twisted-ring counters (TRCs). The proposed technique operates on different operating clocks for generating deterministic test pattern sequence for the circuit under test (CUT). The test vectors generated by LFSR are transformed and reproduced with TRC results. The TRC design constitutes of only flip-flops, which be used as a potential alternative to improved seed storage and complex multi polynomial configurations in LFSR.Moreover, the control logic is simplified with synchronized multi-rate clock generation and can be easily extended for any test cubes among multiple CUTs. The randomness characteristics of LFSR are retained with improved memory efficiency and considerable complexity reduction. Experimental results validate the proposed test pattern generator (TPG) over existing well-known LFSRs models, and its randomness is proved with ISCAS benchmark circuits.