Synaptic Behavior and Conduction Mechanisms in Core-Shell Nanowires for Neuromorphic Hardware Applications

Abstract

To tackle the ever-increasing demand for faster computation time and energy efficiency, analog neuromorphic architectures have been proposed in place of current artificial neural networks (ANNs) to emulate the computational abilities of the brain. Non-volatile, two terminal devices like memristors have been proven as viable candidates as an artificial synapse in these architectures. Presently, these devices are fabricated as crossbar, thin-film or nanowires. Nanowire-based architectures can play an important role in enhancing sparsity and randomness of a network, particularly when built using core-shell structures. We have previously shown that, depending on the forming process, a Pt core and HfO2 shell nanowire with a Ti top electrode can display eightwise (8W) or counter eightwise (C8W) bipolar resistive switching (BRS) at low potential ranges (±1 V). We will show that the symmetry of the core-shell nanowires combined with the 8W and C8W switching observed, are indicative of anti-serial memristor arrangement. Moreover, this configuration allows for the individual nanowires to exhibit complementary resistive switching (CRS) at higher potentials (±2 V). We will also show the current conduction mechanisms of this system, where thermionic emission dominates in the low resistance state while ohmic conduction dominates in the high resistance state, when the device is operated in BRS mode; and hopping conduction dominates in state 0 while space-charge-limited conduction dominates in state 1 when, the device is operated in CRS mode. When in BRS mode, the LRS and HRS states are stable for at least 1000 cycles and retain memory for 104 s. Finally, when testing for synaptic plasticity via long-term potentiation and depression (LTP and LTD), non-linear weight update behavior was observed. The effect of voltage pulse schemes on the synaptic response will be discussed in detail.