Abstract

In integrated photonics, the design goal of a polarization splitter/rotator (PSR) has been separating the TE0 and TM0 modes in a waveguide. This is a natural choice. But in theory, a PSR only needs to project the incoming State Of Polarization (SOP) orthogonally to its output ports, using any orthogonal mode basis set in the fiber. In this article, we introduce a novel PSR design that alternatively takes the linear combination of TE0 and TM0 (TE0 +/- TM0) as orthogonal bases. By contrast, existing approaches exclusively use TE0 and TM0 as their basis set. The design is based on two symmetric and robust structures: a bi-layer taper and a Y-junction, and involves no bends. To prove the concept, we incorporated it into a four-channel polarization insensitive wavelength division multiplexing (PI-WDM) receiver fabricated in a standard CMOS Si photonics process. 40 Gb/s data rate and 0.7 +/- 0.2 dB polarization dependent loss (PDL) is demonstrated on each channel. Lastly, we propose an improved PSR design with 12 μm device length, < 0.1 dB PDL, < 0.4 dB insertion loss and < 0.05 dB wavelength dependence across C-band for both polarizations. Overall, our PSR design concept is simple, easy to realize and presents a new perspective for future PSR designs.

Highlights

  • In addition to transistors, silicon-on-insulator (SOI) material has been proven to be a suitable substrate material for photonic devices, thanks to its high index contrast, tight manufacturing tolerances, compatibility with complementary metal-oxide semiconductor (CMOS) fabrication processes [1]

  • We proposed a novel symmetric polarization splitter/rotator (PSR) design, which we call a ’45-degree PSR’. This PSR takes TE0+/−TM0 as orthogonal bases for polarization splitting and rotation, different from any conventional PSRs, which perform on pure TE0 and TM0 bases

  • To proof the concept of the 45-degree PSR, we demonstrated a 40 Gb/s data transmission in a fourchannel polarization insensitive wavelength division multiplexing (PI-WDM) RX system with only 0.7 +/ – 0.2 dB polarization dependent loss (PDL)

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Summary

Introduction

Silicon-on-insulator (SOI) material has been proven to be a suitable substrate material for photonic devices, thanks to its high index contrast, tight manufacturing tolerances, compatibility with complementary metal-oxide semiconductor (CMOS) fabrication processes [1]. Given the ability to very scale to complex systems-on-chip, this plays to the advantages of the silicon photonics platform This approach depends on having low PDL, high performance PSR devices. The State Of Polarization (SOP) of the input optical signal has been scrambled in the optical fiber during transmission, and the pure TE0 and TM0 component does not hold a unique advantage over other orthogonal bases By breaking this constraint, we have a much wider design space, which enables us to build more optimal devices. The orthogonal bases of this PSR are rotated by 45 degrees compared with conventional PSRs, in other words, 45deg polarized incoming light relative to the orientation of the chip (TE0+/−TM0) is fully directed to one output This design is symmetric in geometry, offers great design freedom to eliminate PDL, and is easy to realize. We’ll propose an improved ultra-compact 45-degree PSR design with 12 μm device length, < 0.1 dB PDL, < 0.4dB simulated IL and < 0.05dB wavelength dependence across C-band for both polarizations

Principle of the 45-degree PSR
PDL measurement
Conclusions
Full Text
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