Survey on Optimization Techniques in High Level Synthesis

Abstract

AbstractThis paper provides a detailed survey of optimization techniques available in high level synthesis. This survey contemplates on two parts. The first part deals with the applicability of optimization techniques available in high level language compiler into high level synthesis. The second part address the topics such as Area optimization, Resource optimization, Power optimization and Optimization issues pertaining to the notions value-grouping, value to register assignment, Transfer to wire assignment and wire to FU port assignment.KeywordsHigh Level SynthesisVery Large Scale Integrated CircuitsFunctional UnitsHDL Compiler