Abstract
The emergence of new classes of HPC applications and usage models, such as real-time HPC and cloud HPC, coupled with the increasingly heterogeneous nature of HPC architectures, requires a renewed investigation of memory management solutions. Traditionally, memory is shared by an operating system using segmentation and paging techniques. At the same time, new classes of applications require Quality of Service (QoS) guarantees. As such, the typical practice of reserving a subset of the supercomputer to a single application becomes less attractive, leading to the exploration of cloud technologies. In this context, a viable scenario is that of multiple applications, with different QoS levels, coexisting on the same deeply heterogeneous HPC infrastructure and sharing resources. However, for this scenario to succeed in practice, resources, including memory, need to be allocated with a vision that includes both the application requirements and the current and future state of the overall system. In this survey, challenges of memory management in HPC and Cloud Computing, different memory management systems and optimisation techniques to increase memory utilisation are discussed in detail.
Highlights
The desire to achieve Exascale leads to the rapid development of high-performance computing at the hardware, software and application levels
We first emphasise the importance of memory optimisation in supporting the Exascale of the future, and we describe the scope of memory management in HPC and Cloud
The work presented in [53] addresses the adoption of dynamic memory management for the design of many-accelerator FPGA-based systems, allowing each accelerator to dynamically adapt its allocated memory according to the runtime memory requirements
Summary
The desire to achieve Exascale leads to the rapid development of high-performance computing at the hardware, software and application levels. To cope with the limited number of memory accesses, which causes the decrease of the modern heterogeneous systems performance, NUMA architectures can allocate a separate memory to perform computational processes and, at the same time, provide a unification of the use of different kinds of memory devices. The co-designed hardware-software mechanism HpMC [34] implements a policy switching engine based on the temporal locality of applications and several new components that extend a single-level memory controller to facilitate switching policies and migrating pages. Communication libraries such as MPI can use HBM to allocate and manage internal memory objects for achieving efficient inter-node communication support This affects the available memory budget, reducing the amount of memory accessible to the user data and, potentially, reducing the overall performance. Accessing and storing a large number of tags are challenging in the multi-gigabyte cache managing
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