Abstract

This paper presents ‘surfing,’ a novel variation of wave pipelining. In previous wave pipelined designs, timing uncertainty grows monotonically as data propagates through gates and other logic elements. Our designs propagate a timing pulse along with the data values, and our logic elements have delays that decrease in the presence of the pulse. This produces a surfing effect wherein events are bound in close proximity to the timing pulse. This produces a robust variant of wave-pipelining where timing dispersion is bounded regardless of the length of the pipeline. We demonstrate our approach with the design of a simple proof-of-concept chip.

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.