Abstract
The hermetically sealed ceramic chip carrier package and the plastic small outline (SO) IC package are both now widely used in hybrid microelectronics. These packages are currently being applied with other discrete surface mount devices to PWB technology in order to increase circuit density and reduce weight. This paper discusses the evaluation of two soldering techniques for the attachment of the chip carrier and SOIC packages to epoxy glass PWBs: the first by solder cream printing or pretinning of the circuit board and subsequent attachment by solder reflow, and the second by a novel jet soldering technique. The thermally induced expansion mismatch between epoxy glass and ceramic chip carriers and the strain induced fatigue this causes in the solder joints are now well documented, and results are presented for the effects of temperature cycling ceramic chip carriers soldered onto PWBs. Various PWB materials have been assessed including FR4, elastomer coated FR4, polyimide kevlar, and epoxy glass laminated copper clad invar. Reliability of these assemblies is discussed in terms of the appearance of micro‐cracks in the solder fillets and the occurrence of electrical discontinuity in the solder joints during temperature cycling.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.