Abstract
The breakdown of reverse biased silicon pn junctions rarely occurs at voltages as high as those predicted theoretically. By means of photoresponse measurements the observed breakdown has been correlated with breakdown at localised regions on the diode surface frequently caused by irregular junction geometry. A model of acceptor traps at the surface of the n-type silicon is proposed to account for the observed variations of the electrical characteristics with the state of the surface. The mechanism of the “pinch-off” of the surface inversion layer is discussed and the maximum voltage which can be supported between the surface and the bulk has been calculated.
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