Abstract
Chemical mechanical planarization (CMP) is a high-precision and complex manufacturing process during which materials are removed with chemical and mechanical actions to achieve highly planar surfaces. However, mechanical failures in interlayer dielectrics (ILD) and adjacent interfaces during Cu CMP processes have already raised serious reliability concerns. An appropriate polishing process is quite necessary to ensure that the structure could bear repeated mechanical and thermal stresses. In this work, we established a Cu CMP finite element model and proposed a surface softer layer removal method, which focused on the reliability of Cu/low K interconnect for 7-nm process technology and beyond. Meanwhile, effects of the polishing down pressure, the coefficient of friction and copper thickness were also investigated comprehensively. The simulation results found that the probability of interface delamination in the low K layer was raised when the polishing down pressure and COF increased, as well as Cu thickness decreased. The maximum peeling stress (MPS) showed a little variation as the COF, Cu thickness and vertical pressure increased. The maximum shear stress (MSS) changed slightly along with the COF and Cu thickness but could be significantly impacted by the vertical pressure. Furthermore, the potential of improving BEOL interconnect reliability through structure and process optimization was explored when the technology continued with dimensional scaling and introduction of porous dielectrics materials.
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