Suppression of DC bias stress-induced degradation of organic field-effect transistors using postannealing effects

Abstract

We fabricate pentacene field-effect transistors (FETs) showing a very small degradation in performance under a continuous DC bias stress. Pentacene FETs are manufactured on polyimide films with polyimide gate dielectric layers, and then encapsulated by poly-chloro-para-xylylene passivation layers, resulting in very flexible and heat-resistant devices. When such devices are annealed at 140°C for 12h in a nitrogen environment, the change in their source-drain current is 3±1% even after the application of continuous DC voltage biases of VDS=VGS=−40V for 11h. Furthermore, their mobility is increased by postannealing effects from 0.27cm2∕Vsto0.36cm2∕Vs and their on/off ratio is also increased from 103 to 106.