Suppressing Quadrature Error and Harmonics in Resolver Signals via Disturbance-Compensated PLL

Abstract

The aim of this study was to obtain accurate angular positions and velocities from resolver signals; resolver-to-digital conversion (RDC) often adopts a phase-locked loop (PLL) as a demodulation algorithm. However, resolver signals often come with quadrature errors and harmonics, which lead to a severe reduction in PLL accuracy. The conventional PLL does not consider the impact of the quadrature error, and the bandwidth of the PLL is much larger than the fundamental frequency of resolver signals for pursuing a low dynamic error. These reasons render the retention of resolver harmonics in the demodulation results. In this paper, a disturbance-compensated PLL (DC-PLL) is proposed, which consists of a phase detector for suppressing quadrature error and harmonics (SQEH-PD) and a second-order observer. Firstly, since the quadrature error does not change with the angle velocity, the pre-estimated quadrature error is used in the SQEH-PD to compensate for the quadrature error in resolver signals. Secondly, although the frequency of the harmonics changes with the velocity, the amplitudes of the harmonics do not change. Therefore, the pre-estimated amplitudes of harmonics and estimated angular position are used in the SQEH-PD to compensate for the harmonics in resolver signals. Thirdly, a second-order observer is designed to estimate the angular position and velocity by regulating the phase detector error. Compared with the conventional PLL, the proposed DC-PLL has a stronger anti-disturbance ability against the quadrature error and harmonics by configurating the phase detector error and the estimated position error, which have a linear relation. Simulation and experimental results prove the effectiveness of the proposed method.