Abstract
Leakage current in a transformerless cascaded H-bridge (CHB) inverter is a problem that deteriorates the system performance and causes safety concerns. In this article, a common-mode equivalent circuit is established for analyzing the occurrence of leakage current in an m-level CHB inverter with either asymmetrical or symmetrical inductance output filter configurations. The analysis provides a comparison between traditional phase shifted pulsewidth modulation, phase disposition pulsewidth modulation, and the proposed leakage current reduction pulsewidth modulation. It is reported that grid leakage current cannot be suppressed in an asymmetrical inductance filter configuration solely based on modulation methods. The proposed leakage current reduction pulsewidth modulation pulsewidth modulation can effectively reduce the grid leakage current in a symmetrical filter configuration nine-level CHB inverter. Simulation and experimental studies for aforementioned methods are provided and their performances are evaluated.
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