Supporting Swap in Real-Time Task Scheduling for Unified Power-Saving in CPU and Memory

Suji Yoon,Heejin Park,Kyungwoon Cho,Hyokyung Bahn

doi:10.1109/access.2021.3140166

Abstract

As the size of data grows rapidly in modern IoT (Internet-of-Things) and CPS (Cyber-Physical System) applications, the memory power consumption of real-time embedded systems increases dramatically. Unlike general-purpose systems where memory consumes about 10% of the CPU power consumption, modern real-time systems have the memory power of 20–50% of CPU power. This is because the memory size of a real-time system should be large enough to accommodate the entire task set, and thus DRAM refresh operations become a major source of power consumption. In this article, we present a new swap scheme for real-time systems, which aims at reducing memory power consumption. To support swap with real-time constraints, we adopt high-speed NVM storage and co-optimize power-savings in CPU and memory. Unlike traditional real-time task models that only consider the executions in CPU, we define an extended task model that characterizes memory and storage paths of tasks as well, and tightly evaluate the worst-case execution time by formulating the overlapped latency between CPU and memory. By optimizing the CPU supply voltage and the memory swap ratio of given task set, our scheme reduces the energy consumption of real-time systems by 31.1% on average under various workload conditions.

Highlights

With the recent advances in IoT (Internet-of-Things) and CPS (Cyber-Physical System) technologies, reducing the power consumption in battery-based real-time systems is becoming increasingly important [1], [2]
EXPERIMENTAL RESULTS we conduct simulation experiments to assess the effectiveness of the proposed scheme called PSVS-GA (Partial Swap with Voltage Scaling using Genetic Algorithms)
PS-GA uses partial swap for memory power-saving similar to PSVS-GA, but does not use CPU voltage scaling, and VS-GA optimizes the CPU voltage level for each task, but does not consider memory swap

Summary

INTRODUCTION

With the recent advances in IoT (Internet-of-Things) and CPS (Cyber-Physical System) technologies, reducing the power consumption in battery-based real-time systems is becoming increasingly important [1], [2]. CPU voltage scaling and memory swap reduce the energy consumption, they increase the execution time of tasks, possibly resulting in the deadline misses of real-time tasks. Our model tightly evaluates the scaled worst-case execution time of a task, considering the overlapped latency between CPU, memory, and swap storage, to minimize overall energy consumption. Where μi is the relative clock frequency of CPU compared to the default frequency to execute task τi, ri is the swap ratio of τi, and latencySWAP is the time required to access the swap storage as a function of the swap I/O size Based on this model, the schedulability test of a realtime task set can be performed by the following utilization test, implying that the scaled worst case execution time after adopting CPU voltage scaling and memory swap should satisfy this inequality.

EXTENDING THE BASIC MODEL

ENERGY POWER MODEL

OPTIMIZATIONS WITH GENETIC ALGORITHMS

SELECTION OF PARENT SOLUTIONS

EXPERIMENTAL RESULTS

CONCLUSION