Abstract
Improving the energy efficiency of computer communication is becoming more and more important as the world is creating a massive amount of data, while the interface has been a bottleneck due to the finite bandwidth of electrical wires. Introducing supply voltage scalability is expected to significantly improve the energy efficiency of communication input/output (I/O) interfaces as well as make the I/Os efficiently adapt to actual utilization. However, there are many challenges to be addressed to facilitate the realization of a true sense of supply-scalable I/O. This paper reviews the motivations, background theories, design considerations, and challenges of scalable I/Os from the viewpoint of computer architecture down to the transistor level. Thereafter, a survey of the state-of-the-arts fabricated designs is discussed.
Highlights
Nowadays, there are huge demands on a smarter world for better human convenience and happiness
To see more deeply how the supply scaling improves the energy efficiency, we review the CMOS dynamic switching power, which is proportional to CV2 f
(CML) circuits have been a majority for base circuit topology for high-speed I/O interfaces owing to their current‐mode logic (CML) circuits have been a majority for base circuit topology for high‐speed I/O
Summary
There are huge demands on a smarter world for better human convenience and happiness (i.e., manufacturing, smart city, autonomous vehicle, security . . . ). Most of the building blocks needs to be designed to work properly at the at the highest leads to a significant the energy efficiency at a data lowerrate. Are marked in the scatter plot efficiencies of transmitters, receivers, and transceivers in [15,16,22,24,25,26,27,28,29,30,31,32,33,34,35] are marked in the scatter with respect to how wide the operating range is (highest data rate/lowest data rate). Current, whichThe includes one is the signaling power, which includes equalization circuits and drivers as well as the power analog circuits relying on current biases—for example, amplifiers and current‐mode logic (CML) Those three types of power consumption exhibit veryand different aspectsas buffers. TX drivers when thethe operating speed changes, which is illustrated on the left side of of power
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