Superior decoupling capacitor for three-dimensional LSI with ultrawide communication bus

Abstract

The superior noise reduction performance of an in-stack decoupling capacitor (DECAP) is demonstrated. A three-tier stacked demonstrator is manufactured with an ultrawide data bus that connects a top memory chip and a bottom logic chip. An in-stack evaluation circuitry on a middle tier (Si interposer) captures voltage variation waveforms during chip-to-chip data communication. In-stack DECAPs in arrays on a Si interposer and discrete ceramic capacitors on an organic interposer of a ball-grid array package are compared. Silicon measurements with an in-stack noise monitoring technique show that the DECAPs on the Si interposer more locally shunt out the AC components of power supply current over a wider frequency range than the capacitors on the package interposer.