Superconductive delay line with integral MOSFET taps

Abstract

A superconducting tapped delay line with programmable MOS transistors for tap weights has been designed, fabricated, and tested. The device operates between 2 and 5 GHz at 4.2 K. The silicon substrate of the integrated semiconductor-superconductor device is used both as the semiconductor material for MOS processing and as the dielectric for the microstrip delay line. The superconducting material is niobium, which is processed after the semiconductor fabrication because the superconducting properties of niobium can degrade if exposed to high temperatures. Both aluminum and niobium are used for transistor gates and interconnects. The novel niobium-gate transistors worked as well as the aluminum-gate transistors at 4.2 K with channel mobilities 3 to 5 times higher than at room temperature. Test results on the weighted tapped delay line show that the amplitude of the tapped outputs may be varied linearly over an 18-dB range between 2 and 2.4 GHz by gate-voltage modulation of the MOSFET channel conductance.