Abstract
Recent experiments, involving thin coverage of metal atoms on III-V semiconductors, suggest that the Fermi level position at the surface for n- and p-type materials may differ by as much as 0.2 eV (1). However, in measurements of Schottky barriers consisting of a bulk metal against a bulk semiconductor, the Fermi level position at the metal-semiconductor interface is found to be the same for both n- and p-type semiconductors to within 0.1 ev (2). To understand this difference, we have investigated the phenomenon of Fermi level pinning by charged interface states at the semiconductor-metal interface. Two limiting cases were investigated. In the first case, we modeled an interface with infinitely thick metal. In the second case, we modeled a submonolayer coverage by using a free semiconductor surface containing defects. In both cases, we assumed that most of the defect induced interface states are localized a few angstroms inside the semiconductor. Under these conditions we have estimated the difference in Fermi level position between n- and p-type semiconductors to be less than 0.05 eV in the case of the thick metallic coverage, which agrees with the theoretical results of Daw and Smith (3). This difference was shown to be the maximum one, and it occurs only when there is no pinning by the defects. When there is pinning, this difference is even smaller. No such upper bound on the difference in Fermi level position exists in the case of submonolayer coverage. We have also found that the number of interface states required to pin the Fermi level is ≃10^14 cm^-2 in the case of coverage by a thick metal, but only ≃10^12 cm^-2 in the case of a submonolayer coverage.
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More From: Journal of Vacuum Science & Technology B: Microelectronics Processing and Phenomena
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