Succinct Monotone Circuit Certification: Planarity and Parameterized Complexity

Abstract

Monotone Boolean circuits are circuits where each gate is either an \(\texttt {AND}\) gate or an \(\texttt {OR}\) gate. In other words, negation gates are not allowed in monotone circuits. This class of circuits has sparked the attention of researchers working in several subfields of combinatorics and complexity theory. In this work, we introduce the notion of certification-width of a monotone Boolean circuit, a complexity measure that intuitively quantifies the minimum number of edges that need to be traversed by a minimal set of positive weight inputs in order to certify that C is satisfied. We call the problem of computing this new invariant, the Succinct Monotone Circuit Certification (SMCC) problem. We prove that SMCC is NP-complete even when the input monotone circuit is planar. Subsequently, we show that the problem is W[1]-hard, but still in W[P], when parameterized by the size of the solution. We also show that SMCC is fixed-parameter tractable when restricted to monotone circuits of bounded genus. In contrast, we show that SMCC on planar circuits does not admit a polynomial kernel, unless NP \(\subseteq \) coNP/poly.