Abstract

According to quantum transport simulations, source-to-drain tunneling (SDT) has been recognized as the main cause leading to subthreshold swing (SS) saturation and degradation of short-channel MOSFETs at cryogenic temperatures. Generally, at a given low temperature, the steeper constant SS of thermionic currents may be overwhelmed by less-steep SDT currents at lower gate bias, degrading the average SS. Our simulations show that the SS of SDT currents is insensitive to temperatures for a MOSFET with a given channel length, accounting for SS saturation as lowering temperature. This work reveals the key points differentiating the possible reasons (interface traps, band tail and SDT) of SS saturation at cryogenic temperatures. We also study the impacts of carrier effective masses, gate-SD underlapping and a tunneling barrier at the source junction on SS saturation. SDT may pose a potential challenge and limit for scaling cryogenic CMOS of a quantum processor.

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