Sub-threshold novel driving techniques of low leakage and high SNM SRAM architecture for high computational design

Abstract

As technology is increasing day by day, customers are expecting high-performance and low-power devices. Though many researchers are working under sub threshold operation still there is a demand for low-power circuits working under sub threshold or near threshold by reducing leakage power. There triggers a need for low power high computational speed and performance. Therefore there is a demand for circuit design that operates under the threshold region. Though low-power circuit designs are attractive, the limiting factor involved here is leakage power when the circuit is operating under sub-threshold operation. However, this logic is more sensitive to temperature, process variations, and the supply voltage as current is exponentially related to voltage in the sub-threshold region. i.e. (Vgs<Vth). The novel design techniques proposed here are Source Coupled Logic, and GDI SRAM to evaluate the functionality, and performance of SRAM Design. Some of the applications like pacemakers and wristwatches evaluate the health conditions specific to bio-medical applications..