Abstract
Substrate noise issues are important for the smooth integration of analog and digital circuitries on the same die. The substrate coupling mechanism with simulation and measurement in a 0.13 µm common source NMOS is demonstrated. The coupling mechanism is related with resistance of ground interconnects; also the importance of coupling mechanism is demonstrated. The results are showing the variation of resistance with distance between the contacts, the inductance and impedance for inductive and capacitive coupling. Key words: Substrate modeling, substrate noise, coupling, finite element method.
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