Submicrometer thin gate oxide P-channel transistors with P+polysilicon gates for VLSI applications

Abstract

Submicrometer p-channel transistors have been fabricated using thin (150 A) gate oxide and p+ polysilicon gates. Favorable device characteristics have been achieved for L(eff) as low as 0.4 µm. P+ gate was formed under different processing conditions. Data showed negligible boron penetration through the thin oxide. Two-dimensional simulations demonstrated the advantages of p+ poly in reducing short channel effects. Experimental results from three device lots with different processing conditions showed good subthreshold slope and low leakage current, even for low threshold voltages. V T versus L(eff) showed much less threshold drop than was seen using n+ poly. Device characteristics were robust with respect to processing variations.