Submicrometer insulated-gate inverted-structure HEMT for high-speed large-logic-swing DCFL gate

Abstract

Application of insulated-gate inverted-structure HEMT (I <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> -HEMT) to the enhancement/depletion (E/D) type direct-coupled FET logic circuits has been investigated. Superior electric characteristics were attained in a submicrometer-gate FET and ring oscillator. The threshold voltage shift with a reduction of gate length from 1.2 to 0.7 µm was as small as -0.05 V at 300 K. Drain conductances were very small and were 2.0 and 3.6 mS/mm at 300 and 77K, respectively. Gate leakage current was small enough even at a gate voltage of + 1.4 V both at 300 and 77 K, and a logic swing of larger than 1.2 V was achieved using a DCFL inverter. A 21-stage E/D-type DCFL ring oscillator with an 0.8-µm gate length showed a minimum gate delay of as small as 18.0 ps at a low power dissipation of 520 µW/gate at 77 K. High-speed and large logic-swing characteristics of the I <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> -HEMT DCFL circuits are accomplished by forming an undoped AlGaAs layer as a gate insulator on the inverted-structure HEMT structure.