Abstract

Abstract The sub-sampling method for Orthogonal Frequency Division Multiplexing proposed recently, has been extended in this paper allowing the Analog-to-Digital Converter on the receiver side to operate in low power mode, up to 3/4 of the time. The predictability of the parity patterns generated by the Forward Error Correction encoder of the transmitter, when sparse data are exchanged, is exploited in order to define appropriate Inverse Fast Fourier Transform input symbol arrangements. These symbol arrangements allow the substitution of a number of samples by others that have already been received. Moreover, several operations of the Fast Fourier Transform can be omitted because their result is zero when identical values appear at its input. The advantages of the proposed method are: low power, higher speed and fewer memory resources. Despite other iterative sub-sampling approaches like Compressive Sampling, the proposed method is not iterative and thus it can be implemented with very low complexity hardware. The simulation results show that full input signal recovery or at least a very low Bit Error Rate is achieved in most of the cases that have been tested.

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