Abstract

The coplanarity of printed circuit boards (PCBs) and surface mount technology packages (e.g. BGAs, LGAs, FCCSPs) is a notable characteristic. It depends on the warpage of the PCBs and the packages which itself is caused by their heterogeneous buildup. BGAs are known to be susceptible to component warpage. In order to this, various BGA solder joint configurations were designed und investigated. This paper will describe a design approach for a reliability test board with respect to different warpage levels - during soldering as well as under temperature shock testing conditions - and the implementation of an electric test environment for a real IC BGA package. First results show that the coplanarity after soldering is mainly influenced by the PCB. Further, different coplanarities cause different and partially unknown damage pictures due to a combination of tensile, compressive and shear stress in BGA solder joints under alternating temperature loads.

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