Abstract
Clock pulse is always generated via crystal vibrator. But in some special conditions that clock pulse circuit is in malfunction, or clock frequency is not high enough, some ingenious implement ways of generating clock pulse in FPGA can solve the problem. In this paper, three methods of generating pulses in FPGA are put forward. The pulses generating are mainly based on short response time of the FPGA logic cells, so the frequency of the pulses is high. Analysis and experiments show that pulses can be generated via FPGA itself other than external clock circuit, and these implement ways of generating clock pulse in FPGA are feasible.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
More From: DEStech Transactions on Computer Science and Engineering
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.