Abstract
The fatigue life considering dispersion of solder joints on chip resistor was investigated by experimental approach and analytical approach. The significant difference of crack propagation ratio was found each specimen by experimental approach. However, it is difficult to clarify the reasons of the difference for the fatigue life of solder joint quantitatively. So, the analytical approach that estimates not only initial crack but crack propagation using FEM and Manson-Coffin law and the linear cumulative-damage law was applied and it was found the fatigue life of minimum dimension of solder joint decreased 20% against typical dimension. The fatigue life of asymmetry solder joints on the sides of chip resistor decreased 64% against the fatigue life of symmetry solder joints. Furthermore, the effect of dispersion on CTE of PWB for the fatigue life of solder joint was estimated. The fatigue life of solder joint in maximum CTE decreased 30% as compared to the typical CTE. Finally, the effect of voids in solder joint on chip resistor was evaluated. When void occupancy is 13%, which is maximum void occupancy in specimens, the fatigue life of solder joint decreased 16%.
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