Abstract

The tunnelling currents through the gate dielectric partly embedded with semiconductingsingle-wall carbon nanotubes in a silicon metal–oxide–semiconductor (MOS) structure havebeen investigated. The application of the gate voltage to such an MOS device results in theband bending at the interface of the partly embedded oxide dielectric and the surfaceof the silicon, initiating tunnelling through the gate oxide responsible for thegate leakage current whenever the thickness of the oxide is scaled. A model forsilicon MOS structures, where carbon nanotubes are confined in a narrow layerembedded in the gate dielectric, is proposed to investigate the direct and theFowler–Nordheim (FN) tunnelling currents of such systems. The idea of embedding suchelements in the gate oxide is to assess the possibility for charge storage for memorydevice applications. Comparing the FN tunnelling onset voltage between thepure gate oxide and the gate oxide embedded with carbon nanotubes, it is foundthat the onset voltage decreases with the introduction of the nanotubes. Thedirect tunnelling current has also been studied at very low gate bias, for the thinoxide MOS structure which plays an important role in scaling down the MOStransistors. The FN tunnelling current has also been studied with varying nanotubediameter.

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