Study of Local BTI Variation and its Impact on Logic Circuit and SRAM in 7 nm Fin-FET Process

Abstract

This paper presents an analysis of impact of local bias temperature instability (BTI) by measuring Ring-Oscillators (RO) with short stage and its impact on Logic circuit and SRAM. The evaluation result of local BTI variation based on measuring RO at a test chip fabricated in 7 nm FinFET process shows that the standard deviation of NBTI $\boldsymbol{Vth}$ degradation is proportional to the square root of the mean value ( $\boldsymbol{\mu}(\mathbf{\Delta} \boldsymbol{Vthp})$ ) at any stress time, $\boldsymbol{Vth}$ flavors and various recovery condition. Based on these measurement result, we present an analysis of its impact on logic circuit with considering measured $\boldsymbol{Vth}$ dependency on global NBTI. We also analyze its impact on SRAM minimum operation voltage ( $\boldsymbol{V_{min}}$ ) of static noise margin (SNM) and shows nonnegligible $\boldsymbol{V_{min}}$ degradation due to local NBTI.