Study of impact ionization effect on power RF N-LDMOS transistor after thermal pulsed RF life test

Abstract

This paper focuses on exploring the correlation between electrical parameters shift of a power RF N-LDMOS transistor and the failure phenomenon that appeared after the conditioning of the pulsed RF life tests (1500 h). Investigational tests are first carried out in real-time using a test bench circuit dedicated for radar circuits' experimentation. The obtained results show that the degradation at low temperature is more adverse after the RF-life tests. Indeed, the leakage gate current amplitude (I GS ) has increased. Moreover, the values of the threshold voltage (V TH ), transconductance (G M ), on-state resistance (R DSON ), feedback capacity (C RSS ), gain, drain efficiency (DE), and S-parameter S 21 has been shifted from their nominal values. A theoretical analysis of the impact of the ionization effect is thereafter made at the electrical macroscopic scale (static, dynamic, and RF) and physical microscopic quantities (electric field, carrier's concentration, current lines, ionization impact rate, etc.). It showed that the located degradation area is due to transistor's parameters shift, which are deeply related to the structure zone. This degradation mechanism at the parameter evaluation origin, which is activated by the carrier generation due to impact ionization approached is confirmed with numerical simulation (Silvaco-TCAD) carried out at on a power RF N-LDMOS, through the increased carrier injection into the developed silicon dioxide layer (SiO 2 ) and/or into interface state Si/SiO 2 . The obtained results are consistent with the experimental data which confirms the impact of the ionization effect on the degradation of the transistor's performances.