Study of Electrical Behavior of Hf-Ti-O Higher-k Dielectric for ETSOI MOSFET Application

Abstract

The electrical properties of Hf-Ti-O higher-k thin film and ETSOI MOSFET with Hf-Ti-O gate dielectric were studied in this work. To accurately extract the permittivity of the Hf-Ti-O thin film, the different physical thicknesses Hf-Ti-O thin films were fabricated by radio frequency magnetron co-sputtering on Si substrate with SiO2 interfacial layer. The permittivity of the Hf-Ti-O thin film is 32.5. The MOS device and ETSOI PMOSFET device using Hf-Ti-O higher-k films as gate dielectric were fabricated by atomic layer deposition (ALD). The MOS device shows low equivalent oxide thickness (EOT) of ~0.76 nm, flat-band voltage (Vfb) of 90 mV, and gate leakage current density (0.31 A/cm 2 @Vfb-1 V). And the ETSOI MOSFET with 40 nm gate-length reveals good electric properties with a switch ratio of 2.8×10 4 , a high transconductance (Gm) of 2.5 mS, appropriate saturation threshold voltage of -0.158 V and liner threshold voltage of -0.199 V. The drain-induced-barrier lowering (DIBL) of 48 mV/V and a subthreshold swing (SS) of 69 mV/dec indicate that ETSOI PMOSFET has good short-channel control capacity.