Study and reduction of the surface pits in 4H-SiC epitaxial wafer

Abstract

Pit defects in SiC epitaxial materials is a new issue which shows an influence on different type of SiC devices such as SBD and MOS. The surface pits generated a leakage current and caused the occurrence of a local electric field crowding in the SBD. While the original and mechanism of the surface pits is still not clear. In the paper, the original and reduction of surface pits during 4H-SiC homoepitaxial growth by a warm wall planetary reactor have been investigated. The C/Si ratio and Cl/Si ratio have great effects on the surface pits. Lower C/Si ratio and higher Cl/Si ratio will form a Si-rich environment on the wafer surface during growth, which is crucial for reduction of the surface pits in 4H-SiC epitaxial wafer. With the optimized parameters, high quality epi-wafer with lower pit defects density has been obtained.