Study and Implementation of Ladder Logic Conversion to VHDL for Field Programmable Gate Array (FPGA)-Based Programmable Logic Controllers (PLC)

Abstract

Programmable Logic Controller (PLC) is commonly used in the modern era of manufacturing and industrial automation. PLC can be programmed in three ways: Ladder logic, function block diagram, and sequential function chart. The most common and popular programming language is ladder logic in PLC. The efficiency of PLC is highly restricted by the speed of microprocessor in real time and the power consumption is quite high. To speed up the PLC performance and flexibility, this paper proposed a new PLC ladder logic design based on FPGA (VHDL). Further with the use of state machine process, the conversion of ladder logic into VHDL has been optimized. There is wide variety and diversity of ladder logic instruction for different PLCs, so a universal converter is required with an extended Boolean expression which will act as a bridge between ladder logic and VHDL. This proposed design will provide improved flexibility, consume less power, increased reliability, faster scanning time, and better performance.