Studies on the electrical characteristics of a high-k dielectric/metal gate MOS capacitor by high-pressure annealing

Abstract

In this work, a high-pressure annealing (HPA) technique at 6 atm over a wide range of temperatures (200 °C–450 °C) was used for post-metallization annealing on a high-k/metal gate MOS capacitor. To verify the ability of HPA to improve interface trap density and leakage issues another MOS capacitor with the same structure was annealed by microwave annealing (MWA) for comparison. The electrical performance of the capacitors under different annealing conditions were analyzed and the difference in characteristics such as flat-band voltage shift, oxide trapped charge, interface state density and leakage current were compared. HPA demonstrates a low trap density when compared with other annealing techniques, indicating potential removal of charge traps and a reduction in leakage current density. The results show that HPA is more effective at minimizing the oxide trapped charged at low temperature than MWA at 3000 W and the reduction in leakage current density after HPA at low temperatures corresponds to the reduction in charge traps. HPA at low temperature demonstrates great potential as a post-metallization annealing process for high-k/metal gate structures due to its ability to overcome undesired effects such as diffusion of Al into the dielectric layer.