Studies of the source and mask optimization for 20nm node in the active layer

Abstract

As semiconductor process technology moves to smaller dimension, RET (resolution enhancement technology) becomes more and more important, especially in low k1 processes. From 28nm node to 20nm node, the k1 becomes smaller with smaller dimension and pitch because exposure tool can provide larger NA (numerical aperture) or smaller exposure wavelength. SMO (source mask optimization) is a RET solution for low k1 process and provide better lithographic common process window in single exposure technology. Base on our studies of aerial image simulation and real wafer experiments on 20nm node, SMO could provide a better solution for 20nm node with 1.35 NA and 193nm exposure wavelength than the other RET sources (Quasar, C-Quad., Dipole). In the first step, the concerned patterns are important for the optimization because the main purpose of SMO is to obtain better performance in those. Through SMO iteration, we can find out a better source for our design rule and concerned patterns (like SRAM, and Small Island patterns). Then, we evaluate whether the simulation results can provide enough accuracy from real wafer data. Base on this study, we can develop a suitable SMO process for 20nm node. In this paper, we will show the optical theory, simulation result and wafer performance of SMO technology.