Studies of the new findings in preparing a scaled amorphous silicon thin-film transistor

Abstract

New findings in deposition of the phosphorus (P)-doped n+ a-Si (amorphous silicon) thin layer as source/drain regions for a scaled thin-film transistor were studied systematically. The sheet resistance of the n+ a-Si layer decreases with decreasing PH3 gas flow rate. As a result, both on-current and on/off current ratio enhance with decreasing PH3 flow rate up to 370 and 1,515 %, respectively. These observations are contrary to the conventional plasma-enhanced CVD doping process, i.e., lower doping will result in a low sheet resistance. Based on the SEM, AFM, FTIR, XRD and Raman analyses, we attribute the new observations to the change of film structure, i.e., from amorphous Si to nano-Si or micro-Si. Also, the origins of the structure shift are discussed in details.