Year-end Sale % OFF 
Abstract
While microprocessors are used in various applications, they are precluded from the use in high-energy physics applications due to the harsh radiation present. To overcome this limitation a microprocessor design must withstand high doses of radiation and mitigate radiation induced soft errors. A TMR protection scheme is applied to protect a RISC-V microprocessor core against these faults. The protection of the integrated SRAM by an independent scrubbing algorithm is discussed. Initial irradiation results and power consumption measurements of the radiation-resistant RISC-V microprocessor implemented in 65 nm CMOS technology are presented.
Submitted Version (
Free)
Published Version
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
