Structure-Preserving-Based Model-Order Reduction of Parameterized Interconnect Systems

Abstract

In recent years, the continued miniaturization of VLSI circuits leads to the need for more efficient simulation of large-scale linear dynamical systems with ever-increasing state-space dimension. The linear dynamical systems in VLSI circuit simulation are RC or RCL models of the VLSI circuit’s interconnected system. Model-order reduction is an important technique to reduce such a high complexity. Along the technology scaling, the indetermination in the manufacturing process causes variations in the critical dimensions and interlevel dielectric thickness of interconnects, which could make the system performance unpredictable and produce a significant parametric yield loss. An efficient exploitation of these design activities results in a parameterized model-order reduction technique able to reduce large systems of equations with respect to all of the variable parameters of the circuit, (i.e., resistance, capacitance, and inductance). For this purpose, we propose a novel parameterized model-order reduction method for interconnect variation systems, which is based on an efficient and reliable combination of invariable structure-preserving model-order reduction (SPMOR) methods and variable parameter retaining schemes. It is referred to as a parameterized interconnect model-order reduction via structure-preserving algorithm. The SPMOR model yields the same form of the original state equation and preserves the passivity of the parameterized RC and RLC networks, like the well-known passive reduced-order interconnect algorithm for nonparameterized RC and RLC networks. The most important benefit it entails is the ability to preserve the probability characteristic of the original interconnect systems. Pertinent numerical examples are proposed to validate the proposed SPMOR approach.