Structural optimization of extremely scaled planar partially insulated field effect transistors (PiFETs)

Abstract

The effects of both the separation between two partially insulated oxide layers (LPiOX) and the thickness of a partially insulated oxide layer (TPiOX) on the short channel effect (SCE) and the intrinsic propagation delay in partially insulated field-effect transistors (PiFETs) are investigated by using technology computer-aided design (TCAD) device simulation. The reverse SCE can be suppressed by controlling the tilt angle of halo implantation to Ttilt = 55°. In the case of a PiFET with the channel length (Lg), as LPiOX/Lg decreases, the subthreshold swing becomes smaller while the drain-induced barrier lowering does larger. The LPiOX/Lg and TPiOX dependence of the intrinsic propagation delay results from the variation of the junction capacitance (Cj). Cj is more sensitive to TPiOX rather than LPiOX/Lg. Conclusive optimal conditions for both SCE and the intrinsic propagation delay are summarized as LPiOX/Lg = 0.6–0.65, TPiOX ⩾ 60 nm and Ttilt = 55°, respectively.