Abstract
AbstractHere, direct correlation between the microstructure of InAs nanowires (NWs) and their electronic transport behavior at room temperature is reported. Pure zinc blende (ZB) InAs NWs grown on SiO2/Si substrates are characterized by a rotational twin along their growth‐direction axis while wurtzite (WZ) InAs NWs grown on InAs (111)B substrates have numerous stacking faults perpendicular to their growth‐direction axis with small ZB segments. In transport measurements on back‐gate field‐effect transistors (FETs) fabricated from both types of NWs, significantly distinct subthreshold characteristics are observed (Ion/Ioff ∼ 2 for ZB NWs and ∼104 for WZ NWs) despite only a slight difference in their transport coefficients. This difference is attributed to spontaneous polarization charges at the WZ/ZB interfaces, which suppress carrier accumulation at the NW surface, thus enabling full depletion of the WZ NW FET channel. 2D Silvaco‐Atlas simulations are used for ZB and WZ channels to analyze subthreshold current flow, and it is found that a polarization charge density of ≥1013 cm−2 leads to good agreement with experimentally observed subthreshold characteristics for a WZ InAs NW given surface‐state densities in the 5 × 1011–5 × 1012 cm−2 range.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.