Abstract

This work proposes a method to prevent unwanted string current degradation in multistacks vertical NAND (VNAND) flash memory for hardware-based binary neural networks (BNNs). Simulations investigate the effect of string resistance on the accuracy of a multilayer BNNs, considering the measured cell string characteristics. When the weights obtained from off-chip training are transferred to the BNN without compensation cells, the classification accuracy of the hardware-based BNN is reduced by ~80.3% in 23-layer network. However, the proposed compensation cell model shows a degradation of classification accuracy of 1.4% in the 23-layer BNN compared to the software-based BNN.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.