Stress-Induced Off-Current under On- and Off-State Stress Voltages in Low-Temperature n-Channel Polycrystalline Silicon Thin-Film Transistors

Abstract

The changes in off-current under on- and off-state stress voltages in n-channel polycrystalline silicon (poly-Si) thin-film transistors (TFTs) are investigated through measurements and simulations. It is found that the off-current increases markedly in the shallow-negative-gate-voltage region and decreases in the deep-gate-voltage region after applying both on- and off-state stresses, resulting in a weaker dependence on negative gate voltage. It can be supposed from the simulations and experiments that the donor-type trap states (positive charges) with a hump-type state profile, located at 0.1–0.2 eV below the midgap, and tail states are generated near the drain junction after applying both stresses. The amount of donor-type states increases in phonon-assisted tunneling with the Pool–Frenkel effect (PAT) and Schockley–Read–Hall generation (SRH) owing to the increase in the deep-trap-state density, and decreases in band-to-band tunneling (BBT) owing to the decrease in electric field, giving rise to a predominant PAT+SRH current in off-current in a wide-negative-gate-voltage region.