Abstract
This study proposes an approach to estimate parasitic capacitance shift under mechanical stress. The silicon-on-insulator n-/p- metal-oxide-semiconductor field-effect transistors (MOSFETs) and CMOS ring oscillators (ROs) were fabricated side by side in this study. External compressive stresses were applied on a strained channel of n-/p-MOSFETs and ROs in longitudinal and transverse configurations. The modeling mobilities of CMOS ROs used the measurement results of n-/p-MOSFET to simulate their oscillation frequencies under external stresses. The frequency difference between the experiment and simulation indicates parasitic capacitance variation under stresses.
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