Stress Evolution with Annealing Methods in SOI Wafer Pairs

Abstract

It is of importance to know that the bonding strength and interfacial stress of SOI wafer pairs to meet with mechanical and thermal stresses during process. We fabricated Si/2000<TEX>$\AA$</TEX>-SiO<TEX>$_2$</TEX> ∥ 2000<TEX>$\AA$</TEX>-SiO<TEX>$_2$</TEX>/Si SOI wafer pairs with electric furnace annealing, rapid thermal annealing (RTA), and fast linear annealing (FLA), respectively, by varying the annealing temperatures at a given annealing process. Bonding strength and interfacial stress were measured by a razor blade crack opening method and a laser curvature characterization method, respectively. All the annealing process induced the tensile thermal stresses. Electrical furnace annealing achieved the maximum bonding strength at <TEX>$1000^{\circ}C$</TEX>-2 hr anneal, while it produced constant thermal tensile stress by <TEX>$1000^{\circ}C$</TEX>. RTA showed very small bonding strength due to premating failure during annealing. FLA showed enough bonding strength at <TEX>$500^{\circ}C$</TEX>, however large thermal tensile stress were induced. We confirmed that premated wafer pairs should have appropriate compressive interfacial stress to compensate the thermal tensile stress during a given annealing process.