Abstract
In this paper, we explore strategies for automated parallelization and reconfiguration across heterogeneous multi-core processor, based on a programming paradigm and an associated model of computation designed for efficient and automated parallelization across processing elements, efficient reconfiguration (i.e., mapping of computational tasks across processing elements), and combining synchronous and asynchronous I/O handling within the same conceptual programming model. We introduce an analytical model of parallelization, unlocked by graph programming, that can effectively reason about power and performance tradeoffs in heterogeneous multi-core, and inform reconfiguration strategies. We analyze the implications of our model through an analysis of reconfiguration scenarios given a program’s characteristics; our analysis quantifies the benefits of reconfiguring software for higher levels of parallelism, given an amount of data left to process. We empirically validate the performance advantage of our automatic parallelism capabilities through Horde, an open source graph programming interpreter; in our experiments, automatic parallelization from one to four cores improves average case execution time by a factor of 2 and worst case execution time by a factor of 3. When reconfiguring across heterogeneous processors, our model can predict execution time with an average error of 9.45%.
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