Strained p-Channel MOSFET Fabrication Challenge and Perspective for the 28-Nm Technology Node and Beyond

Abstract

The embedded epitaxial silicon germanium (eSi1-xGex) in the recessed source/drain (S/D) area modulates the lattice constant and band structure of silicon at the channel region then enhances the hole/electron mobility of MOSFETs. For the 28nm node planar devices, the strict control of recessed profile could be achieved by plasma-based one-step or two-step silicon dry etch process combined with the post wet chemical treatments. Here we analyzed the process loading correlated to the pitch of gate electrodes and the tunable capability on final sigma-shaped trench profile for these two types of processes. The strain/stress induced mobility enhancement technique of fin structure FETs should be significantly different from that of traditional planar FETs. We successfully decoupled the trade-off between the gate capping layer protection and the silicon nitride spacer pull-back before the p-channel fin recess step. Additionally, by balancing the isotropic and anisotropic spacer open parts in the whole etch process, we also demonstrated the fin structures with flat and smooth recessed surface on their top area, which would benefit for future good crystalline and well controlled Pi-shaped eSi1-xGex growth.