Strain and lattice engineering for Ge FET devices

Abstract

One of the main challenges to creating a GeOI-based FET is simply to create a high-quality single-crystal layer for the channel material. Due to the low cost and wide availability of Si substrates, the most popular approach to Ge FET material development has been to integrate Ge with existing Si wafers (either by wafer bonding or direct growth). The different strategies for integrating Ge layers with existing Si-based substrates will be reviewed and discussed. The strain and relaxation behavior in high-content SiGe and pure Ge layers will be shown to put serious limitations on the possible integration schemes if defects are to be minimized. A discussion of the formation of SGOI by high-temperature oxidation will be discussed and it will be shown that the residual strain follows a universal trend. This trend allows one to design and fabricate lattice-engineered substrates for heteroepitaxial growth. An analysis of the residual strain in thin strained Ge layers indicates that the response of these crystals also follows the universal trend and is described using a simple equilibrium model. Lastly, the effective Poisson ratio was measured for the strained Ge layers and was found to vary as a function of the in-plane strain. The Poisson ratio was measured to vary from near the bulk value (0.27) at low strain, and decrease nearly linearly to ∼0.17 at 4% compressive strain.