Storage allocation strategies for data path synthesis of ASICs

Abstract

In this paper, we concentrate on the storage allocation problem in datapath synthesis. Datapath allocation techniques can be classified into two main categories: iterative/constructive; and global. Storage allocation deals with determining the number of registers that are needed. Registers are used in datapaths to store values that are generated in one control step and used in an other. When lifetimes of such values do not overlap, they can then be mapped on to the same registers. Just as in the case of functional unit allocation, storage allocation also affects the steering and interconnection logic. Therefore storage allocation must take into consideration minimization of such logic. Storage allocation does not necessarily deal with register allocation. In lieu of registers, register files or memory units can be used to decrease overall area. >